This invention relates to an image sensor.
A first conventional technology will be described with reference to the outline construction view of FIG. 1.
As shown in FIG. 1, this image sensor 110 uses a so-called photogate. That is, a photogate 112 is formed on a P-type semiconductor substrate 111. An N.sup.+ -type first impurity layer 113 of this photogate 112 is formed in a state common with one of the diffusion layers of a transfer gate 114.
To the other N.sup.+ -type second impurity layer 115 of the transfer gate 114, the gate of a source follower [for example constituted by a MOS (Metal-Oxide-Semiconductor) transistor] 121 is connected and one of the diffusion layers of a reset gate 122 is connected. Also, a vertical switch (for example constituted by a MOS transistor) 123 is connected to the source follower 121 in series.
Next, as a second conventional technology, an amplifying type MOS image sensor 130 of the kind shown in the outline construction view of FIG. 2 has been proposed from the technology research center of Nihon Hoso Kyokai.
That is, an N.sup.+ -type impurity layer 131 to become a light-receiving part is formed in a part of an upper layer of a P-type semiconductor substrate (for example a silicon substrate) 111.
To the N.sup.+ -type impurity layer 131, the gate of a source follower (for example constituted by a MOS transistor) 121 is connected and one of the diffusion layers of a reset gate 122 is connected. Also, a vertical switch (for example constituted by a MOS transistor) 123 is connected to the source follower 121 in series.
An image sensor of this kind is described in F. Andoh, K. Taketoshi, J. Yamazaki, M. Sugawara, Y. Fujita, K. Mitani, Y. Matuzawa, K. Miyata, S. Araki: "A 250,000-Pixel Image Sensor with FET Amplification at Each Pixel for High-Speed Television Cameras", ISSCC Digest of Technical Papers, pp. 212-213 (Feb. 1990).
When an image sensor of the construction shown in FIG. 1 is formed using a miniaturization CMOS process, the gate electrode of the photogate is formed with tungsten polycide. Consequently, the gate electrode becomes one which does not allow light to pass through. To avoid this, by adding and carrying out a so-called mask step, it is possible to remove a tungsten layer of the tungsten polycide and make it a construction of a gate electrode whose transmittivity of light has been raised. However, absorption of light by polysilicon, and particularly absorption of blue light, cannot be ignored.
Also, because red light penetrates as far as the inside of the substrate, and a P-type semiconductor substrate is used for the substrate, so-called inter-pixel crosstalk, wherein electrons photoelectrically converted in the P-type substrate itself enter the surrounding pixels, occurs. This is a serious problem in constructing a so-called 1-chip color image sensor.
Also, in an image sensor the occurrence of after-image and the realization of high sensitivity are in a so-called trade-off relationship. That is, during charge accumulation, the potential of the photogate is in a shallow state, and the potential of the transfer gate is in an intermediate state. The potential of the reset gate is in a shallow state. When it is operated in this kind of potential state, the transfer gate becomes a transverse type overflow gate, the voltage of the impurity layer (115) described with reference to the above-mentioned FIG. 1 becomes VDD and the impurity layer (115) becomes an overflow drain.
On the other hand, during detection, when the potential .phi.RS of the reset gate is made deep and the source follower and the vertical switch are operated, switching noise (hereinafter called kTC noise) in the impurity layer (115) described with reference to the above-mentioned FIG. 1, which arises on cut-off of the reset gate, is detected.
Also, during signal detection, the potential of the photogate is made deep, the charge in the photogate and the impurity layer (113) described with reference to the above-mentioned FIG. 1 is moved to the impurity layer (115) and the potential of the impurity layer (115) is detected by the source follower and the vertical switch.
With the detection method described above, only the impurity layer (115) becomes so-called floating diffusion, the capacitance (capacitance) is the most small and kTC noise, which is switching noise, can be detected, and CDS (Correlated Double Sampling) is possible. In other words, realizing high sensitivity becomes easy.
However, because charge transfer from the impurity layer (113) through the transfer gate to the impurity layer (115) is by the BBD (Bucket Brigade Device) method, which is a method wherein a signal charge accumulates in a capacitor and this is transferred to the next capacitor in so-called bucket relay fashion by the switching action of a MOS-FET (field-effect transistor), after-image occurs.
When trying to eliminate after-image, it is necessary to raise the voltage of the transfer gate on resetting and reset both the impurity layer (113) and the impurity layer (115). At this time, the charge of the photogate is also reset.
In this case, after the potential .phi.RS of the reset gate is made shallow, the voltage of the transfer gate is made high and charge in the photogate and the impurity layer (113) moves to the impurity layer (113) and the impurity layer (115) and the transfer gate and a potential is detected by the source follower and the vertical switch.
However, because the impurity layer (113) and the impurity layer (115) and the transfer gate become so-called floating diffusion, the capacitance (capacitance) of this so-called floating diffusion increases.
The image sensor described in the above-mentioned second conventional technology also produces inter-pixel crosstalk, for the same reasons as the above-mentioned first conventional technology. As a construction for avoiding the occurrence of this inter-pixel crosstalk, the kind of construction shown in the outline construction view of FIG. 3 has been proposed.
As shown in FIG. 3, this image sensor 140 is one obtained by, in the image sensor (130) described with reference to the above-mentioned FIG. 2, using an N-type semiconductor substrate 141 for the substrate, forming a P-type well layer 142 on that N-type semiconductor substrate 141, and forming an N.sup.+ -type impurity layer 143 to become a light-receiving part on that P-type well layer 142. The construction of the source follower 121, the reset gate 122 and the vertical switch 123 is the same as the construction described with reference to the above-mentioned FIG. 2.
However, in processes miniaturizing MOS structures, because the impurity concentration of the P-type well layer 142 is coming to be set high, with the image sensor described with reference to the above-mentioned FIG. 3, the junction capacitance between the P-type well layer 142 and the N.sup.+ -type impurity layer 143 increases. Consequently, because the charge detection capacitance (the junction capacitance pertaining to the N.sup.+ -type impurity layer 143 and the interconnection capacitance as far as the source follower 121) becomes large, the detection sensitivity decreases.